Design for Manufacturability, Softcover reprint of the original 1st ed. 2014
From 1D to 4D for 90–22 nm Technology Nodes

Author:

Language: English

108.44 €

In Print (Delivery period: 15 days).

Add to cartAdd to cart
Design for Manufacturability
Publication date:
Support: Print on demand

105.49 €

In Print (Delivery period: 15 days).

Add to cartAdd to cart
Design for Manufacturability. From 1D to 4D for 22 nm Technology Nodes
Publication date:
278 p. · 15.5x23.5 cm · Hardback
This book explains integrated circuit design for manufacturability (DfM) at the product level (packaging, applications) and applies engineering DfM principles to the latest standards of product development at 22 nm technology nodes.  It is a valuable guide for layout designers, packaging engineers and quality engineers, covering DfM development from 1D to 4D, involving IC design flow setup, best practices, links to manufacturing and product definition, for process technologies down to 22 nm node, and product families including memories, logic, system-on-chip and system-in-package.

Preface.- Classic DfM: from 2D to 3D.- DfM at 28 nm and Beyond.- New DfM Domain: Stress Effects.- Conclusions and Future Work.

Artur Balasinski is a Technology Design Integration Manager for Cypress Semiconductor in San Jose, California.

Provides design for manufacturability guidelines on layout techniques for the most advanced, 22 nm technology nodes

Includes information valuable to layout designers, packaging engineers and quality engineers, working on memories, logic, system-on-chip and system-in-package

Offers a highly-accessible, single-source reference to information otherwise available only from disparate sources

Helps readers to translate reliability methodology into real design flows