Through-silicon vias (TSVs) for 3D integration

Through-Silicon Vias (TSVs) for 3D Integration covers cutting-edge developments in 3D ICs-essential for the development of low-cost, high-performance electronic and optoelectronic products. The book proposes that every chip or interposer could have two surfaces with circuits. This detailed guide discusses TSV manufacturing yield and hidden costs and includes characterization and reliability data for 3D IC integration. The in-depth information in the book provides context for choosing robust, reliable, high-performance, cost-effective packaging and 3D IC/Si integration techniques for high-density electronic products. Through-Silicon Vias (TSVs) for 3D Integration. Emphasizes the key enabling technologies for 3D IC integrations: Designs and tests. Known-good die (KGD) testing methods. TSV forming and filling. Wafer thinning and handling. Thin chip/wafer strength measurement and improving. Lead-free microbumping and assembly. Low temperature C2C, C2W, and W2W bonding. Thermal management. Presents applications of 3D IC integration: CMOS image sensor. MEMS. LED. Wide I/O. Memory + logic. Logic + logic. Memory + microprocessor. Active and passive interposers.