Description
Transactions on High-Performance Embedded Architectures and Compilers V, 1st ed. 2019
Transactions on High-Performance Embedded Architectures and Compilers Series
Coordinators: Silvano Cristina, Bertels Koen, Schulte Michael
Editor-in-Chief: Stenström Per
Language: EnglishSubjects for Transactions on High-Performance Embedded Architectures...:
Keywords
3D; application programming interfaces (api); computer architecture; computer graphics equipment; computer networks; embedded systems; hardware; image processing; image reconstruction; interfaces (computer); microprocessor chips; multiprocessing systems; parallel programming; processors; virtual reality; wireless sensor networks; wireless telecommunication systems
141 p. · 15.5x23.5 cm · Paperback
Description
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Efficient Mapping of Streaming Applications for Image Processing on Graphics Cards.-Programmable and Scalable Architecture for Graphics Processing Units.- Circular Buffers with Multiple Overlapping Windows for Cyclic Task Graphs.- A Hardware-Accelerated Estimation-Based Power Profiling Unit. - Enabling Early Power-Aware Embedded Software Design and On-Chip Power Management.- The Abstract Streaming Machine: Compile-Time Performance Modelling of Stream Programs on Heterogeneous Multiprocessors.- Prototyping a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability.- A Dynamic Reconfigurable Super-VLIW Architecture for a Fault Tolerant Nanoscale Design.