VLSI Design and Test, 1st ed. 2017
21st International Symposium, VDAT 2017, Roorkee, India, June 29 – July 2, 2017, Revised Selected Papers

Communications in Computer and Information Science Series, Vol. 711

Coordinators: Kaushik Brajesh Kumar, Dasgupta Sudeb, Singh Virendra

Language: English

105.49 €

In Print (Delivery period: 15 days).

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This book constitutes the refereed proceedings of the 21st International Symposium on VLSI Design and Test, VDAT 2017, held in Roorkee, India, in June/July 2017.
The 48 full papers presented together with 27 short papers were carefully reviewed and selected from 246 submissions. The papers were organized in topical sections named: digital design; analog/mixed signal; VLSI testing; devices and technology; VLSI architectures; emerging technologies and memory; system design; low power design and test; RF circuits; architecture and CAD; and design verification.

Digital design.- Analog/mixed signal.- VLSI testing.- Devices and technology.- VLSI architectures.- Emerging technologies and memory.- System design.- Low power design and test.- RF circuits.- Architecture and CAD.- Design verification.

Includes supplementary material: sn.pub/extras