MIPS risc architecture (Paper)
Author: KANELanguage: Anglais
Approximative price 113.19 €
Subject to availability at the publisher.Add to cart the livre of KANE
774 p. · 23.4x17.8 cm · Paperback
- RISC Architecture: An Overview
- MIPS Processor Architecture Overview
- CPU Instruction Set Summary
- Memory Management System
- Exception Processing
- FPU Overview
- FPU Instruction Set Summary and Instruction Pipeline
- Floating Point Exceptions
- describes the user Instruction Set Architecture (ISA), as implemented by the R2000, R3000, R4000, and R6000 (collectively known as the R-Series) processors, together with an extension to this ISA.
- describes the general characteristics and capabilities of each RISC processor, along with a description of the programming model, memory management unit (MMU), and the registers associated with each processor.
- includes an overview of the underlying concepts that distinguish RISC architecture from Complex Instruction Set Computer (CISC) architecture.