VLSI Systems and Computations, Softcover reprint of the original 1st ed. 1981

The papers in this book were presented at the CMU Conference on VLSI Systems and Computations, held October 19-21, 1981 in Pittsburgh, Pennsylvania. The conference was organized by the Computer Science Department, Carnegie-Mellon University and was partially supported by the National Science Foundation and the Office of Naval Research. These proceedings focus on the theory and design of computational systems using VLSI. Until very recently, integrated-circuit research and development were concentrated in the device physics and fabrication design disciplines and in the integrated-circuit industry itself. Within the last few years, a community of researchers is growing to address issues closer to computer science: the relationship between computing structures and the physical structures that implement them; the specification and verification of computational procosses implemented in VLSI; the use of massively parallel computing made possible by VLSI; the design of special­ purpose computing architectures; and the changes in general-purpose computer architecture that VLSI makes possible. It is likely that the future exploitation of VLSI technology depends as much on structural and design innovations as on advances in fabrication technology. The book is divided into nine sections: - Invited Papers. Six distinguished researchers from industry and academia presented invited papers. - Models of Computation. The papers in this section deal with abstracting the properties of VLSI circuits into models that can be used to analyze the chip area, time or energy required for a particular computation.

Invited Papers.- The Optical Mouse, and an Architectural Methodology for Smart Digital Sensors.- Designing a VLSI Processor — Aids and Architectures.- Keys to Successful VLSI System Design.- Programmable LSI Digital Signal Processor Development.- Functional Parallelism in VLSI Systems and Computations.- Functional Extensibility: Making The World Safe for VLSI.- Models of Computation.- Replication of Inputs May Save Computational Resources in VLSI.- Planar Circuit Complexity and the Performance of VLSI Algorithms.- Three-Dimensional Integrated Circuitry.- A Critique and an Appraisal of VLSI Models of Computation.- Complexity Theory.- On the Complexity of VLSI Computations.- On the Area Required by VLSI Circuits.- The VLSI Complexity of Sorting.- Minimum Edge Length Planar Embeddings of Trees.- The VLSI Approach to Computational Complexity.- Layout Theory and Algorithms.- Optimal Placement for River Routing.- The Separation for General Single-Layer Wiring Barriers.- Provably Good Channel Routing Algorithms.- Optimal Routing in Rectilinear Channels.- New Lower Bounds for Channel Width.- Compact Layouts of Banyan/FFT Networks.- Languages and Verification.- Syntax-Directed Verification of Circuit Function.- Temporal Specifications of Self-Timed Systems.- A Mathematical Approach to Modelling the Flow of Data and Control in Computational Networks.- A Wavefront Notation Tool for VLSI Array Design.- A Matrix Data Flow Language/Architecture for Parallel Matrix Operations Based on Computational Wavefront Concept.- Special-Purpose Architectures.- Digital Signal Processing Applications of Systolic Algorithms.- A Two-Level Pipelined Systolic Array for Convolutions.- Systolic Algorithms for Running Order Statistics in Signal and Image Processing.- Systolic Array Processor Developments.- A Systolic (VLSI) Array for Processing Simple Relational Queries.- A Systolic Data Structure Chip for Connectivity Problems.- Multiplier Designs.- Fixed-Point High-Speed Parallel Multipliers in VLSI.- A Mesh-Connected Area-Time Optimal VLSI Integer Multiplier.- A Regular Layout for Parallel Multiplier of O(log2n) Time.- Processors.- VLSI Implementations of a Reduced Instruction Set Computer.- MIPS: A VLSI Processor Architecture.- Comparative Survey of Different Design Methodologies for Control Parts of Microprocessors.- C.FAST: A Fault Tolerant and Self Testing Microprocessor.- Systems and Processors.- VLSI Processor Arrays for Matrix Manipulation.- A General-Purpose CAM-Based System.- A Statically Scheduled VLSI Interconnect for Parallel Processors.- The CMOS SLA Implementation and SLA Program Structures.- A New CCD Parallel Processing Architecture.