Structural Decision Diagrams in Digital Test, 1st ed. 2024
Theory and Applications
Computer Science Foundations and Applied Logic Series

This is the first book that sums up test-related modeling of digital circuits and systems by a new structural-decision-diagrams model. The model represents structural and functional information jointly and opens a new area of research.

The book introduces and discusses applications of two types of structural decision diagrams (DDs): low-level, structurally synthesized binary DDs (SSBDDs) and high-level DDs (HLDDs) that enable diagnostic modeling of complex digital circuits and systems.

Topics and features:

• Provides the definition, properties and techniques for synthesis, compression and optimization of SSBDDs and HLDDs
• Provides numerous working examples that illustrate the key points of the text
• Describes applications of SSBDDs and HLDDs for various electronic design automation (EDA) tasks, such as logic-level fault modeling and simulation, multi-valued simulation, timing-critical path identification, and test generation
• Discusses the advantages of the proposed model to traditional binary decision diagrams and other traditional design representations
• Combines SSBDDs with HLDDs for multi-level representation of digital systems for enabling hierarchical and cross-level solving of complex test-related tasks

This unique book is aimed at researchers working in the fields of computer science and computer engineering, focusing on test, diagnosis and dependability of digital systems. It can also serve as a reference for graduate- and advanced undergraduate-level computer engineering and electronics courses.

Three authors are affiliated with the Dept. of Computer Systems at the Tallinn University of Technology, Estonia: Raimund Ubar is a retired Professor, Jaan Raik and Maksim Jenihhin are tenured Professors. Artur Jutman, PhD, is a researcher at the same university and the CEO of Testonica Lab Ltd., Estonia.

Chapter 1: Introduction.- Chapter 2: Overview of structural decision diagrams.- Chapter 3: Structurally Synthesized Binary Decision Diagrams.- Chapter 4: Fault modeling in digital circuits.- Chapter 5: Logic-level fault simulation.- Chapter 6: Test generation, fault diagnosis and testability.- Chapter 7: High-Level Decision Diagrams.- Chapter 8: Test generation for microprocessors with HLDDs.

Prof. Emeritus Raimund Ubar is a professor emeritus at the Department of Computer Systems of Tallinn University of Technology, Estonia. He received his Ph.D. degree at Bauman Moscow State Technical University in 1971, and DSc degree at Latvian Academy of Sciences in 1986. He has been with TU Tallinn since 1971, Head of the Computer Department (1987-1992), Head and Founder of the Electronics Competence Center (1993-1996), and Head of the Estonian Research Centre for Integrated Electronic Systems and Biomedical Engineering (2007-2015). He has published more than 500 peer-reviewed scientific papers and 5 books and supervised 20 PhDs. His research interests cover a wide area in electrical engineering and computer science domains, including digital design and test, fault modeling and diagnosis, design for testability, as well as fault tolerance and built-in self-test. He has lectured and given courses at more than 20 universities, served as General Chair for the European Test Conference, and other conferences such as NORCHIP, BEC, EWDTC. He is a member of Estonian Academy of Sciences, Life Senior Member of IEEE, Golden Core member of IEEE Computer Society, and honored professor of Ukrainian State University of Radioelectronics. He was awarded from Estonian Government by White Cross Orden of III Class, by National Award for Long-term Successful R&D, and by several Meritorious Service Awards of the IEEE Computer Society.

Recent books:

1. R.Ubar, A.Jasnetski, A.Tsertov, A.S.Oyeniran. Software-Based Self-Test with Decision Diagrams for Microprocessors. Lambert Academic Publishing, 2018, 171 p.

2. R.Ubar, J.Raik, H.-T.Vierhaus (Eds). Design and Test Technology for Dependable Systems-on-Chip. IGI Global, 2011, 550 p.

3. O.Novak, E.Gramatova, R.Ubar. Handbook of Electronic Testing. CTU Printhouse, Prague, 2005, 400 p

Prof. Jaan Raik is a professor of digital systems' verification at the Department of Computer Systems and the head