Design Automation for Differential MOS Current-Mode Logic Circuits, Softcover reprint of the original 1st ed. 2019

Language: English

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Design Automation for Differential MOS Current-Mode Logic Circuits
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147.69 €

In Print (Delivery period: 15 days).

Add to cartAdd to cart
Design Automation for Differential MOS Current-Mode Logic Circuits
Publication date:
Support: Print on demand

This book discusses the implementation of digital circuits by using MCML gates. Although digital circuit implementation is possible with other elements, such as CMOS gates, MCML implementations can provide superior performance in certain applications. This book provides a complete automation methodology for the implementation of digital circuits in MCML and provides an extensive explanation on the technical details of design of MCML.  A systematic methodology is presented to build efficient MCML standard-cell libraries, and a complete top-down design flow is shown to implement complex systems using such building blocks.

Introduction.- Analysis of MOS Current-Mode Logic Circuits.- Design of MOS Current-Mode Logic Cells.- Design Methodology for MCML Standard Cells.- Design Automation for Differential Circuits.- Design Example I : Low-Noise Encoder Circuit for A/D Converter.- Design Example II : High-Speed Multiplexer.- Design Example III : Grain-128a Stream Cipher.- Design Example IV: DPA Resistant Processor.

Stéphane Badel has received his Electrical Engineering degree from Ecole d'ingénieurs de Genève in 1999, his M.Sc. degree from Swiss Federal Institute of Technology in Lausanne (EPFL) in 2003, and his Ph.D. degree also from EPFL in 2008. He has worked as mixed-signal design engineer at Icera Semiconductor, and at NVIDIA. Currently, he is working as a Physical Design Engineer at Huawei Technologies.

 

Can Baltacı received the B.S. degree in Electronics Engineering from Middle East Technical University, Ankara, Turkey and M.S. degree in Electrical Engineering from Swiss Federal Institute of Technology in Lausanne (EPFL), Switzerland in 2010 and 2013, respectively. He is currently studying towards his PhD degree at the Swiss Federal Institute of Technology in Lausanne (EPFL). His research interests include self-heating effects in high performance analog and digital circuits implemented in bulk and FDSOI.

 

Alessandro Cevrero received the M.Sc.degree in nanotechnology and the Ph.D. degree in electrical engineering from the Swiss Federal Institute of Technology, Lausanne, Switzerland, in 2007 and 2014, respectively. In 2012, he joined IBM Research—Zurich, Rüschlikon, Switzerland, where he has been involved in analog circuit design and silicon validation of high-speed energy-efficient I/O links in advanced CMOS technologies. His current research interests include high-speed analog circuit design, 3-D integration, and semiconductor manufacturing. In these areas, he has authored or co-authored over 35 technical publications.

 

Yusuf Leblebici received his B.Sc. and M.Sc. degrees in electrical engineering from Istanbul Technical University, in 1984 and in 1986, respectively, and his Ph.D. degree in electrical and computer engineering from the University of Illinois at Urbana-Champaign (UIUC) in 1990. Since 2002, Dr. Leblebici is a Chair Professor at the Swiss Federal Institute of Technology in Lausanne (EPFL),and Directo
Discusses various application areas where MCML implementation is essential in order to obtain superior circuit performance Offers detailed and clear analysis of MCML gates considering different performance parameters such as output drive capability, power dissipation, noise margin, and silicon area Describes top-down design methodology of creating a standard cell library in MCML containing detailed explanation of logic synthesis, MCML footprints, different standard cell layout techniques Provides step-by-step explanation of design automation methodology for differential circuits and its main differences compared to single ended CMOS design automation Includes four different design examples, using the presented design automation methodologies of MCML, with analysis of the performance of these examples and a comparison with CMOS implementations