Hardware Security and Trust, Softcover reprint of the original 1st ed. 2017
Design and Deployment of Integrated Circuits in a Threatened Environment

This book provides a comprehensive introduction to hardware security, from specification to implementation. Applications discussed include embedded systems ranging from small RFID tags to satellites orbiting the earth. The authors describe a design and synthesis flow, which will transform a given circuit into a secure design incorporating counter-measures against fault attacks. In order to address the conflict between testability and security, the authors describe innovative design-for-testability (DFT) computer-aided design (CAD) tools that support security challenges, engineered for compliance with existing, commercial tools. Secure protocols are discussed, which protect access to necessary test infrastructures and enable the design of secure access controllers.

AES Datapaths on FPGAs: a State of the Art Analysis.- Fault Attacks, Injection Techniques and Tools for Simulation.- Recent developments in side-channel analysis on Elliptic Curve Cryptography implementations.- Practical Session: Differential Power Analysis for Beginners.- Fault and Power Analysis Attack Protection Techniques for Standardized Public Key Cryptosystems.- Scan Design: Basics, Advancements and Vulnerabilities.- Manufacturing Testing & Security Countermeasures.- Malware Threats and Solutions for Trustworthy Mobile Systems Design.- Ring Oscillators and Hardware Trojan Detection.- Notions on Silicon Physically Unclonable Functions.- Implementation of delay-based PUFs on Altera FPGAs.- Implementation and Analysis of Ring Oscillator Circuits on Xilinx FPGAs.-

Nicolas Sklavos is an Associate Professor, with the Computer Engineering & Informatics Department, Polytechnic School, University of Patras, Hellas.

He holds an award for his PhD thesis on “VLSI Designs of Wireless Communications Security Systems”, from IFIP VLSI SOC, Germany, 2003. He has been awarded with a post-doctoral research scholarship, from the National Scholarship Foundation.

He has participated in a great number of European and National projects, with both research & management activities, funding by the European Commission or/and National resources.

He also acts as a reviewer and evaluator for both European Commission Project Calls, and National Project Calls of several countries.

He is Associate Editor of the Electrical & Computer Engineering Journal, Hindawi and Cryptography, ΜDPI Publisher. He was the Editor in Chief of Information Security Journal: a Global Perspective, Taylor Francis Group, from 2011 to 2014. He also served as Associate Editor of IEEE Transactions of Latin America, and Computers & Electrical Engineering Journal, Elsevier and Information Security Journal: a Global Perspective, Taylor Francis Group. He has been invited as Guest Editor of Special Issues of several publishers. He has been awarded as Top Associated Editor for 2010 and 2011, from Computers & Electrical Engineering Journal, Elsevier.

He is an IEEE, Senior Member. From 2007 to 2014, he was the Council’s Chair of IEEE Greece Young Professionals.

He is an Associated Member of European Network of Excellence (HiPEAC). He is a member of the IFIP Working Group 11.3 on Data and Application Security and Privacy. He is also a member of International Association for Cryptologic Research (IACR), the Technical Chamber of Greece, and the Greek Electrical Engineering Society.

He has participated in the committees of up to 300 conferences organized by IEEE, ACM, IFIP, as General, Program, Publication, etc, Chair, and with other

Covers all aspects of hardware security including design, manufacturing, testing, reliability, validation and utilization; Describes new methods and algorithms for the identification/detection of hardware trojans; Defines new architectures capable of detecting faults and resisting fault attacks; Establishes a design and synthesis flow to transform a given circuit into a secure design, incorporating counter-measures against fault attacks. Includes supplementary material: sn.pub/extras