Hardware/Software Architectures for Low-Power Embedded Multimedia Systems, 2011

This book presents techniques for energy reduction in adaptive embedded multimedia systems, based on dynamically reconfigurable processors. The approach described will enable designers to meet performance/area constraints, while minimizing video quality degradation, under various, run-time scenarios. Emphasis is placed on implementing power/energy reduction at various abstraction levels. To enable this, novel techniques for adaptive energy management at both processor architecture and application architecture levels are presented, such that both hardware and software adapt together, minimizing overall energy consumption under unpredictable, design-/compile-time scenarios.

Introduces general concepts and requirements of embedded multimedia systems based on advanced video codecs, dynamically reconfigurable processors, and low-power techniques in reconfigurable computing Describes novel techniques and concepts for providing adaptivity and energy reduction jointly at processor and application architecture levels Provides techniques for enabling run-time configurability for quality vs. energy consumption tradeoff at the application level Includes supplementary material: sn.pub/extras