Description
On-Chip ESD Protection for Integrated Circuits, Softcover reprint of the original 1st ed. 2002
An IC Design Perspective
The Springer International Series in Engineering and Computer Science Series, Vol. 663
Author: Wang Albert Z.H.
Language: English
On-Chip ESD Protection for Integrated Circuits
Publication date: 03-2013
303 p. · 15.5x23.5 cm · Paperback
Publication date: 03-2013
303 p. · 15.5x23.5 cm · Paperback
Approximative price 232.09 €
Subject to availability at the publisher.
Add to cart the print on demand of Wang Albert Z.H.
On-chip ESD protection for integrated circuits. An IC design perspective (POD)
Publication date: 01-2002
Support: Print on demand
Publication date: 01-2002
Support: Print on demand
Description
/li>Contents
/li>Biography
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This comprehensive and insightful book discusses ESD protection circuit design problems from an IC designer's perspective. On-Chip ESD Protection for Integrated Circuits: An IC Design Perspective provides both fundamental and advanced materials needed by a circuit designer for designing ESD protection circuits, including:
- Testing models and standards adopted by U.S. Department of Defense, EIA/JEDEC, ESD Association, Automotive Electronics Council, International Electrotechnical Commission, etc.
- ESD failure analysis, protection devices, and protection of sub-circuits
- Whole-chip ESD protection and ESD-to-circuit interactions
- Advanced low-parasitic compact ESD protection structures for RF and mixed-signal IC's
- Mixed-mode ESD simulation-design methodologies for design prediction ESD-to-circuit interactions, and more!
ESD Test Models.- ESD Protection Device Solutions.- ESD Protection Circuit Solutions.- Advanced ESD Protection.- ESD Failure Analysis and Modeling.- Layout and Technology Influences on ESD Protection Circuit Design.- ESD Simulation-design Methodologies.- ESD-circuit Interactions.- Conclusion Remarks and Future Work.
Albert Z.H. Wang received his PhD in Electrical Engineering from The State University of New York at Buffalo in 1995. After working for National Semiconductor Corporation in Santa Clara, CA, as a Staff R&D Engineer, he joined the Electrical and Computer Engineering Department at Illinois Institute of Technology in 1998. His research interests and publications center on analog, mixed-signal, RF and SoC IC design, on-chip ESD protection circuit design, IC CAD, and other closely related subjects.
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