Pipelined ADC Design and Enhancement Techniques, 2010
Analog Circuits and Signal Processing Series

Language: English

Approximative price 158.24 €

In Print (Delivery period: 15 days).

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Pipelined ADC Design and Enhancement Techniques
Publication date:
200 p. · 15.5x23.5 cm · Paperback

Approximative price 158.24 €

In Print (Delivery period: 15 days).

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Pipelined ADC design & enhancement techniques (Analog circuits & signal processing series)
Publication date:
200 p. · 15.5x23.5 cm · Hardback

Pipelined ADCs have seen phenomenal improvements in performance over the last few years. As such, when designing a pipelined ADC a clear understanding of the design tradeoffs, and state of the art techniques is required to implement today's high performance low power ADCs.

Pipelined ADC Design.- ADC Architectures.- Pipelined ADC Architecture Overview.- Scaling Power with Sampling Rate in an ADC.- State of the Art Pipelined ADC Design.- Pipelined ADC Enhancement Techniques.- Rapid Calibration of DAC and Gain Errors in a Multi-bit Pipeline Stage.- A Power Scalable and Low Power Pipelined ADC.- A Sub-sampling ADC with Embedded Sample-and-Hold.- A Capacitive Charge Pump Based Low Power Pipelined ADC.- Summary.
Based on award winning and practical works published at ISSCC and ESSCIRC. The fact that the ideas discussed in the book have already been vetted by a high calibre peer-review ensures the reader will be getting premium content Discusses many approaches used to enable very low power consumption; an area of interest for 'green' electronics Enables the reader to gain both tutorial and detailed insight into state-of-the-art pipelined ADCs from one source Includes supplementary material: sn.pub/extras