Transaction-Level Power Modeling, 1st ed. 2020

This book describes for readers a methodology for dynamic power estimation, using Transaction Level Modeling (TLM). The methodology exploits the existing tools for RTL simulation, design synthesis and SystemC prototyping to provide fast and accurate power estimation using Transaction Level Power Modeling (TLPM).  Readers will benefit from this innovative way of evaluating power on a high level of abstraction, at an early stage of the product life cycle, decreasing the number of the expensive design iterations.

Introduction.- Fundamental Concepts.- Power Modeling and Characterization.- Transaction Level Power Modeling Methodology.- Experimental Results.- Conclusions and Future Work.

Amr Baher Darwish received his B.Sc and M.Sc degrees in Electronics Engineering from Ain Shams University, Cairo, Egypt, in 2011 and 2017, respectively. In 2011, he worked as Design Application Engineer for RF/AMS team, Intel Corporation, Cairo, Egypt. Between November 2013 and May 2016, he was Quality Assurance Engineer in IC Verification Solutions department at Mentor, a Siemens business, Cairo, Egypt. During June 2016 and April 2018, he worked as Backline Customer Support Engineer in the same company. Between October 2017 and March 2019, he worked as Senior Quality Assurance Engineer in Mentor. Currently, he is Questa SIM Product Engineer at Mentor, a Siemens business, Cairo, Egypt. Amr has published journal and conference papers in dynamic power estimation.

Magdy A. El-Moursy received the B.S. degree in electronics and communications engineering (with honors) and the Master's degree in computer networks from Cairo University, Cairo, Egypt, in 1996 and 2000, respectively, and the Master's and the Ph.D. degrees in electrical engineering in the area of high-performance VLSI/IC design from University of Rochester, Rochester, NY, USA, in 2002 and 2004, respectively. In summer of 2003, he was with STMicroelectronics, Advanced System Technology, San Diego, CA, USA. Between September 2004 and September 2006 he was a Senior Design Engineer at Portland Technology Development, Intel Corporation, Hillsboro, OR, USA. During September 2006 and February 2008 he was assistant professor in the Information Engineering and Technology Department of the German University in Cairo (GUC), Cairo, Egypt. Between February 2008 and October 2010 he was Technical Lead in the Mentor Hardware Emulation Division, Mentor Graphics Corporation, Cairo, Egypt.

Dr. El-Moursy is currently Engineering Manager in Integrated Circuits Verification Systems Division, Mentor, A Siemens Business and Associate Professor in the Microelectronics Department, Electronics Research Institute, Ca