Stress and Strain Engineering at Nanoscale in Semiconductor Devices
Auteur : Maiti Chinmay K.
Anticipating a limit to the continuous miniaturization (More-Moore), intense research efforts are being made to co-integrate various functionalities (More-than-Moore) in a single chip. Currently, strain engineering is the main technique used to enhance the performance of advanced semiconductor devices. Written from an engineering applications standpoint, this book encompasses broad areas of semiconductor devices involving the design, simulation, and analysis of Si, heterostructure silicongermanium (SiGe), and III-N compound semiconductor devices. The book provides the background and physical insight needed to understand the new and future developments in the technology CAD (TCAD) design at the nanoscale.
Features
- Covers stressstrain engineering in semiconductor devices, such as FinFETs and III-V Nitride-based devices
- Includes comprehensive mobility model for strained substrates in global and local strain techniques and their implementation in device simulations
- Explains the development of strain/stress relationships and their effects on the band structures of strained substrates
- Uses design of experiments to find the optimum process conditions
- Illustrates the use of TCAD for modeling strain-engineered FinFETs for DC and AC performance predictions
This book is for graduate students and researchers studying solid-state devices and materials, microelectronics, systems and controls, power electronics, nanomaterials, and electronic materials and devices.
Chapter 1. Introduction
Chapter 2. Simulation Environment
Chapter 3. Stress Generation Techniques in CMOS Technology
Chapter 4. Electronic Properties of Engineered Substrates
Chapter 5. Bulk-Si FinFETs
Chapter 6. Strain-Engineered FinFETs at NanoScale
Chapter 7. Technology CAD of III-Nitride Based Devices
Chapter 8. Strain-Engineered SiGe Channel TFT for Flexible Electronics
Professor Chinmay K. Maiti, PhD is an Ex-Professor and Ex-Head of Department from Indian Institute of Technology (IIT) – Kharagpur, India. He then joined the SOA University, Bhubaneswar in May 2015 as a Professor, where he is now on a Visiting Assignment. He is interested in strain-engineering in nanodevices, flexible electronics, and semiconductor device/process simulation research, and microelectronics education. He has published several monographs in Silicon-Germanium, heterostructure-Silicon, and Technology CAD areas. He has edited the "Selected Works of Professor Herbert Kroemer", World Scientific, Singapore, 2008.
Date de parution : 09-2023
15.6x23.4 cm
Date de parution : 07-2021
15.6x23.4 cm
Thèmes de Stress and Strain Engineering at Nanoscale in... :
Mots-clés :
Gate Length; TCAD; TCAD Simulation; CMOS; Piezoresistive Coefficients; FinFET; GaN HEMT; III-V Nitride; SiGe Layers; AC/DC; DD Model; 7 nm technology; Threshold Voltage; Short Channel Effects; Device Simulation; SiGe Channel; Ge Content; Virtual Fabrication; MGG; MC; FP; Piezoelectric Polarization; TCAD Tool; SS; Spontaneous Polarization; Discrete Dopants; Out-of Plane Lattice Parameter; Sentaurus TCAD; RDD; Mobility Enhancement; GaN Layer