Description
Synthesis and Optimization of FPGA-Based Systems, Softcover reprint of the original 1st ed. 2014
Lecture Notes in Electrical Engineering Series, Vol. 294
Authors: Sklyarov Valery, Skliarova Iouliia, Barkalov Alexander, Titarenko Larysa
Language: EnglishSubjects for Synthesis and Optimization of FPGA-Based Systems:
158.24 €
In Print (Delivery period: 15 days).
Add to cart the print on demand of Sklyarov Valery, Skliarova Iouliia, Barkalov Alexander, Titarenko LarysaPublication date: 09-2016
Support: Print on demand
158.24 €
In Print (Delivery period: 15 days).
Add to cart the book of Sklyarov Valery, Skliarova Iouliia, Barkalov Alexander, Titarenko LarysaPublication date: 03-2014
432 p. · 15.5x23.5 cm · Hardback
Description
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The book is composed of two parts. The first part introduces the concepts of the design of digital systems using contemporary field-programmable gate arrays (FPGAs). Various design techniques are discussed and illustrated by examples. The operation and effectiveness of these techniques is demonstrated through experiments that use relatively cheap prototyping boards that are widely available. The book begins with easily understandable introductory sections, continues with commonly used digital circuits, and then gradually extends to more advanced topics. The advanced topics include novel techniques where parallelism is applied extensively. These techniques involve not only core reconfigurable logical elements, but also use embedded blocks such as memories and digital signal processing slices and interactions with general-purpose and application-specific computing systems. Fully synthesizable specifications are provided in a hardware-description language (VHDL) and are ready to be tested and incorporated in engineering designs. A number of practical applications are discussed from areas such as data processing and vector-based computations (e.g. Hamming weight counters/comparators). The second partof the book covers the more theoretical aspects of finite state machine synthesis with the main objective of reducing basic FPGA resources, minimizing delays and achieving greater optimization of circuits and systems.
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